Towards a new software architecture:
Nano micro kernel

With decades of track record of bugs and security vulnerabilities, todays connected IT world, servers, personal computers and other Internet of Things are in need for a new, more secure and stable software foundation.

Minimal Kernel

"Make everything as simple as possible": starting at the kernel. Code that does not need to be at the highest privilege level should not be there. Implementing 90% of the features with (hopefully) less than 10% of lines of code and complexity.

Hardware Abstraction Layer

Many hardware platforms have subtile incompatibilities, or proprietary features. For example the various ARM, MIPS, (SPARC) variants. Different memory maps, interrupt controllers, GPIOs, clocks, virtualization. A HAL nano kernel is there to abstract this differences to a generic API for the micro kernel and user-space to access.

Avoid Code & Driver duplication

Todays systems duplicate drivers and algorithms multiple times. Computer BIOS' or embedded firmware include basic drivers, file-system access, compression, encryption libraries and nowadays even a network stack. Instead of reimplementing everything with slightly different APIs or ABIs, or limited functionality an ideal software stack should only include each once. Reducing the trusted compute base, avoiding bugs and incompatibilities.

Drivers - Normal user-space code

As decades of research as show, code is best isolate for security and stability. We therefore follow this model to give each driver an isolated space in memory. This can even help making writing drivers simpler and easier.

Memory safety

No primary C runtime, instead basing on memory safer languages and foundation libraries. Potentially a "lightweight" C++ subset, Rust or a new variant thereof.

Graphic subsystem

User-space UI graphic server, not an afterthought, one coherent architecture without a complex kernel, user-space, direct rendering shared object split.

Low-level code sharing

To share, and accelerate the efforts hardware register driver defines will be portably defined in headers for re-use in other embedded firmware, hypervisor or OS research.

Reasonable performance thru vectored IPC

To avoid inter user-space context switching, IPC can be optimiized thru vectored, similar to io_uring system calls.

JIT - first class

Forward scalable code by dynamic JIT, or AOT compilation, for SIMD, and other extensions, like RISCV Bitmanip, hashing & encryption, etc.

Everything user-space

Naturally all driver and sub-system implementations are regular user-space programs: drivers, file-systems, network stack, graphic, sound, ...

In the meantime you may find some viable solutions using the T2 SDE, ExactCODE, our YT channel; ...

Copyright (c) 2021-2022. All rights reserved.